The present invention relates to a semiconductor device and its method of manufacture. The invention is preferably applicable to a non-contact type identification device particularly utilizing a thin semiconductor chip.
Japanese Published Unexamined Patent Application No. Hei 8-316194 discloses a conventional way of assembling a thin semiconductor chip. This conventional method will be described with reference to FIGS. 1(a) to 1(d). FIG. 1(a) is a cross-sectional view showing a tape 53 having an adhesive layer 52, to which semiconductor chips 54 with adhesive 45 are attached. FIG. 1(b) is a cross-sectional view of the tape 53, following the state shown in FIG. 1(a), wherein a tape 63 having an adhesive layer 62 is attached to the semiconductor chips 54, and the tape 53 is irradiated with ultraviolet light 61 so as to release the semiconductor chips 54 therefrom. FIG. 1(c) is a cross-sectional view of the sheet 63 to which the semiconductor chips have been transferred in the operation illustrated in FIG. 1(b). The sheet is turned over. A semiconductor chip 54 is aligned with an electrode 11 on a film substrate 23, and a heating head 64 is pressed against the sheet to heat the adhesive which holds the chip on the tape 63. FIG. 1(d) is a cross-sectional view of the film substrate 23, after the adhesive 45 on the semiconductor chip has been melted, showing the semiconductor chip attached to the electrode 11.
As shown in FIGS. 1A to 1D, generally, in the thin semiconductor chip assembly, the chips are attached to a tape for handling and alignment of the chips. In a case where the thin semiconductor chips are separately handled, since the separated chips can be non-uniformly placed on their front/rear surfaces, the assembly is very difficult. Further, since the chips are thin, there is a probability of damage to the chips when they hit something upon handling, with the result that there may be a loss of a chip corner or the like. The damaged chip become a defective chip.
Since the rate of excellent chips decreases in the proportion to the amount of defects, the chip yield is reduced. Accordingly, generally, handling and alignment of chips are performed by the method as shown in FIGS. 1A to 1D. Since handling after the chips are separated causes the production yield to be deteriorated, such handling is not performed on a mass-production basis.
The object of the present invention is to reduce the number of process steps in a manufacturing method to a smaller number of steps than the number of steps in the conventional thin-semiconductor chip handling and alignment method as shown in FIG. 6.
Further, another object of the present invention is to simplify the attachment apparatus necessary for the thin-semiconductor chip handling and alignment.
In accordance with the present invention, an alignment jig 401, as shown in FIG. 2A, is prepared. The jig 401 has single or plural grooves, openings or holes (hereinbelow, holes) 402, and alignment of identification chips 12 is accomplished by inserting the identification chips 12 into the holes 402 of the jig 401. Preferably, the identification chips have a rectangular or square plane shape. The holes 402 have a size somewhat larger than the plane size of the identification chips. The identification chips 12 are attached to a film substrate 403, as shown in FIG. 2B, provided under the jig. One surface of each aligned identification chip 12 adheres to the film substrate 403.
In this state, a pair of electrode pads are provided on each identification chip 12, and radiation antennas 404 are attached, in the form of wings, to the pads. It is preferable that the electrode pads are provided approximately symmetrically with respect to the center of the identification chip 12. In this arrangement, in a case where the identification chip 12 is rotated 90xc2x0 in the hole 402 and aligned, or in a case where the identification chip 12 is aligned without such rotation, electrical connection is established between the antennas and the electrodes.
FIGS. 3A and 3B show examples where the electrodes of the identification chip 12 are provided approximately symmetrically with respect to, not the central point, but a central axis. Here the same advantage as that in FIG. 2A can be obtained. In addition to the examples in FIGS. 2A, 2B, 3A and 3B, in any cases of alignment where the electrodes are aligned in not unique, but plural ways, it is necessary to define the positions and the shape of the electrodes, the position and the shape of the antenna, and the like, such that the antennas can be properly positioned on the electrodes.
Further, the identification chip 12 might be turned over before alignment. In such case, the antennas must be properly aligned with the electrodes and electrically connected to the electrodes. FIGS. 4A and 4B show constructions for this purpose, where two antennas are provided so as to hold the identification chip therebetween. For example, antennas 71 and 75 hold the identification-chip 12 between them (FIGS. 4A and 4B shows these antennas, overlapped with each other, like a single antenna). One of the antennas is electrically connected to the electrode of the identification chip 12. That is, only one antenna connected to the electrode performs its function. In FIGS. 4A and 4B in a case where the identification chip 12 is rotated 0xc2x0 or 90xc2x0 before alignment, or in a case where the identification chip 12 is turned over or is not turned over electrical connection still can be established between the electrodes and the antennas.
The constructions for the above purpose are as follows.
1. A semiconductor device where the front and rear surfaces of a semiconductor chip are held between two conductors having a pattern set at a position to establish connection with a front-surface terminal of the semiconductor chip.
2. The semiconductor chip has a thickness equal to or less than 110 microns.
3. The pattern is an antenna.
4. A semiconductor device where the front and rear surfaces of a semiconductor chip are held between two conductors having a pattern set at positions to establish connection with at least a surface terminal of the semiconductor chip, wherein the conductors are printed on a film substrate.
5. A semiconductor device where the front and rear surfaces of a semiconductor chip are held between two conductors, having a pattern, set at positions to establish connection with at least a surface terminal of the semiconductor chip, wherein the conductors are printed on a film substrate, and wherein the film substrate is stored in roll form.
6. A semiconductor device wherein, when front and rear surfaces of a semiconductor chip are held between two conductors having a pattern, which is set at a positions to establish connection with at least a surface terminal of the semiconductor chip, an anisotropic conductive adhesive is already attached to the surface of the semiconductor chip.
7. A semiconductor device wherein, before front and rear surfaces of semiconductor chip are held between two conductors having a pattern, set at positions to establish connection with at least a surface terminal of the semiconductor chip, an anisotropic conductive adhesive is already attached to the surface of the semiconductor chip, the anisotropic conductive adhesive having been attached to the semiconductor chip before the semiconductor chip was cut into a shape of semiconductor chip.
8. A semiconductor device where the front and rear surfaces of a semiconductor chip are held between two conductors having a pattern, set at positions to establish connection with at least a surface terminal of the semiconductor chip, wherein the conductors are printed on a film substrate, and wherein the film substrate is stored in a roll, further wherein the semiconductor chip and the conductors are cut out in use.
9. A semiconductor device where an electrode and an antenna are connected with each other by using conductive paste printed in an electrode portion by screen printing.
10. A semiconductor device where an oxide film is formed on the surface of an electrode, the electrode is connected with an antenna with conductive paste, and a capacitor between the antenna and the electrode is used as an input capacitor of a multiplying rectifier circuit.
Other features and advantages of the present invention will be apparent from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same name or similar parts throughout the figures thereof.